7474 Dual D-type Flip-Flop with Preset and Clear

Propagation Delay

	Input		Output	N	LS	ALS	ALS 1000	F	S	AS	AS 1000	HC	HCT	Unit
fmax	Clock		-	15	25	34	-	100	75	105	-	21	-	MHz(min)
tw	Clock	H	-	30	25	14.5	-	4	6	4	-	20	-	nS(min)
		L		37	-	14.5	-	5	7.3	5.5	-	-	-	nS(min)
	Preset Clear	L		30	25	15	-	4	7	4	-	20	-	nS(min)
tsu	D		-	20	25	15	-	3	3	4.5	-	25	-	nS(min)
thold				5	5	0	-	1	2	0	-	0	-	nS(min)
tpd	Clock		Q, Q'	40	40	18	-	9.2	9	9	-	44	-	nS(max)
	Preset Clear			40	40	15	-	10.5	13.5	10.5	-	58	-	nS(max)




Input Characteristics

		N	LS	ALS	ALS 1000	F	S	AS	AS 1000	Unit
Clock	High	80	20	20	-	20	100	20	-	uA
	Low	3.2	0.4	0.2	-	0.6	4	0.5	-	mA
D	High	40	20	20	-	20	50	20	-	uA
	Low	1.6	0.4	0.2	-	0.6	2	0.5	-	mA
Preset	High	80	40	40	-	20	100	40	-	uA
	Low	1.6	0.8	0.4	-	1.8	4	1.8	-	mA
Clear	High	120	40	40	-	20	150	40	-	uA
	Low	3.2	0.8	0.4	-	1.8	6	1.8	-	mA




Output Characteristics

		N	LS	ALS	ALS 1000	F	S	AS	AS 1000	HC	HCT	Unit
Q, Q'	High	0.4	0.4	0.4	-	1	1	2	-	4	-	mA
	Low	16	8	8	-	20	20	20	-	4	-	mA

t_su는 clock이 상승하기 전의 data 안정시간
t_hold는 clock이 상승한 후 data 안정시간