7473 Dual JK Flip-Flop with Clear

Propagation Delay

	Input		Output	N	LS	ALS	ALS 1000	F	S	AS	AS 1000	HC	HCT	Unit
fmax	Clock		-	15	30	-	-	-	-	-	-	21	-	MHz(min)
tw	Clock	H	-	20	20	-	-	-	-	-	-	20	-	nS(min)
		L		47	-	-	-	-	-	-	-	-	-	nS(min)
	Clear	L		25	25	-	-	-	-	-	-	20	-	nS(min)
tsu	J, K		-	0	20	-	-	-	-	-	-	25	-	nS(min)
thold				0	0	-	-	-	-	-	-	0	-	nS(min)
tpd	All Inputs		Q, Q'	40	20	-	-	-	-	-	-	32	-	nS(max)




Input Characteristics

		N	LS	ALS	ALS 1000	F	S	AS	AS 1000	Unit
Clock	High	80	80	-	-	-	-	-	-	uA
	Low	3.2	0.8	-	-	-	-	-	-	mA
J, K	High	40	20	-	-	-	-	-	-	uA
	Low	1.6	0.4	-	-	-	-	-	-	mA
Clear	High	80	60	-	-	-	-	-	-	uA
	Low	3.2	0.8	-	-	-	-	-	-	mA




Output Characteristics

		N	LS	ALS	ALS 1000	F	S	AS	AS 1000	HC	HCT	Unit
Q, Q'	High	0.4	0.4	-	-	-	-	-	-	4	-	mA
	Low	16	8	-	-	-	-	-	-	4	-	mA

t_su : Data settling time before rising the clock.
t_hold : Data settle time after rising the clock.
7473 is a master-slave type, 74LS73 is a Negative Leading Edge Trigger type.